Extensive development effort has been made and is being made in the field of logic circuitry employing bipolar transistors. In the art, a development that has encountered great interest is I.sup.2 L (Integrated Injection Logic). It has been widely discussed in technical literature, cp. e.g. the articles in the IEEE Journal of Solid-State Circuits, (1) "Merged-Transistor Logic (MTL) - A Low-Cost Bipolar Logic Concept," Vol. SC-7, No. 5, October 1972, pages 340 through 346 by Horst H. Berger and Siegfried K. Wiedmann, and (2) "Integrated Injection Logic: A New Approach to LSI," Vol. SC-7, No. 5, October 1972, pages 346 through 351 by Kees Hart and Arie Slob. Patent literature references are, for example, U.S. Pat. Nos. 3,736,477 and 3,816,758. The injection logic concept is based substantially on multi-collector transistors for negation (inverter transistors) which are fed by direct injection, i.e. injection taking place inside the semiconductor body, of minority carriers into the vicinity (in the order of one diffusion length) of their emitter/base junctions.
This bipolar logic concept offers short switching times as well as an excellent applicability for the structuring of large scale integrated circuits with a large number of logic gates that can be made on one single semiconductor chip. For the manufacture of logic circuits in highly integrated technology such circuits have to meet three main conditions. The basic elements have to be as simple and space-saving as possible so that as many as possible can be provided on one semiconductor chip. Secondly, the circuits have to be designed in such a manner that a sufficient speed does not cause an excessive rise of the power dissipation on the semiconductor chip. This equals the demand for a minimum product of the factors delay time and power dissipation per logic function. Thirdly, the necessary manufacturing process has to be simple and easily realizable for obtaining a high yield. All these points of view are considered by the above mentioned logic concept in principle, and in particular as compared with the existing logic concepts (e.g. TTL logic).
It is furthermore known from the publication in the IBM Technical Disclosure Bulletin Publication entitled "Integrated, Separately Switchable Current Sources" by H. H. Berger, Vol. 14, No. 5, October 1971, pp. 1422, 1423 and GE-OS 20 27 127 that in a lateral NPN zone sequence the injection current coming from a primary injector can be switched via a secondary injector in the path of the injection current. However, a complex logic system cannot yet be realized in that manner owing to the lack of an inverter function. There furthermore exists a publication in IEEE Solid-State Circuits Conference 1974, Digest of Technical Papers, 18/19 which describes how the logic AND and OR combinations are to be realized. The inversion required for each logic system, however, is achieved in NPN transistors. This system has the disadvantage that the (logically acting) secondary injection structures have to be isolated from the (inverting) NPN transistors. Additionally these NPN transistors have to be isolated from each other. Furthermore, the decoupling of the inputs of various injection structures, which are to be controlled by the same input signal, requires a considerable amount of decoupling.
It is the primary object of the present invention to improve the above mentioned injection logic concept to achieve an increased logic efficiency. Considering the continuous demand for a maximum simplicity of the basic structures provision is made for further logic functions. Also less complicated realization of former logic functions is accomplished. Other existing restrictions of the prior art are removed, or at least mitigated. Significantly, such as the limited number of existing decoupled outputs of the prior art is obviated. It should especially be appreciated that complex logic networks structured from the basic logic gates require in general a high degree of problematic conductive line connections. Finally, a maximum of flexibility regarding utilization for a great variety of logic networks is presented.
The invention provides a semiconductor arrangement substantially predicated on the principle of current feeding by means of direct injection, where through condition-dependent switching of the injection current on its path toward the respective output-side inverter transistor, additional input or also output means are available. Thus, otherwise necessary conductive line connections on the semiconductor body are replaced to a high degree by internal controllable injection couplings. Contrary to circuits of a different type, the availability of a maximum number of decoupled inputs and outputs - also for partial logic functions - is of particularly high importance for the required system designs in logic circuits. It is furthermore highly desirable that from such a circuit output another input can always be driven again, without signal conversion. These criteria are satisfied in the arrangement in accordance with the invention.
The foregoing and other objects and features of the invention will be more apparent from the following more particular description of the preferred embodiments of the invention, as illustrated in the accompanying drawings.
Below, the invention and the preferred embodiments in accordance with the invention will be described in detail by means of the drawings.